Stands for 'Industry Standard Architecture.' ISA is a type of bus used in PCs for adding expansion cards. For example, an ISA slot may be used to add a video card, a network card, or an extra serial port. The original 8-bit version of PCI uses a 62 pin connection and supports clock speeds of 8 and 33 MHz. 16-bit PCI uses 98 pins and supports the same clock speeds.
ISA is a type of bus used in PCs for adding expansion cards. For example, an ISA slot may be used to add a video card, a network card, or an extra serial port. The original 8-bit version of PCI uses a 62 pin connection and supports clock speeds of 8 and 33 MHz. 16-bit PCI uses 98 pins and supports the same clock speeds. This PC with 3 ISA slots in a mid-tower chassis provides native ISA support to extend the life of your legacy devices. This Pentium 4 computer will support MS Dos, Windows 95, Windows 98, Windows NT, Windows 2000, and Windows XP. Also available in a 4U Rackmountable chassis. Processor speed minimum, may vary according to availability. Different Kinds of Expansion Slots. There have been several types of expansion slots over the years, including PCI, AGP, AMR, CNR, ISA, EISA, and VESA, but the most popular one used today is PCIe. While some newer computers still have PCI and AGP slots, PCIe has basically replaced all of the older technologies. To connect an ISA card to a computer, the motherboard must have an ISA slot. As mentioned above, today's computers no longer come with ISA expansion slots and most modern operating systems no longer support ISA. If your motherboard does not have an ISA expansion slot, we recommend getting a more modern card supported by your motherboard.
The original 8-bit version of ISA was introduced in 1981 but the technology did not become widely used until 1984, when the 16-bit version was released. Two competing technologies -- MCA and VLB -- were also used by some manufacturers, but ISA remained the most common expansion bus for most of the 1980s and 1990s. However, by the end of the twentieth century, ISA ports were beginning to be replaced by faster PCI and AGP slots. Today, most computers only support PCI and AGP expansion cards.
The Instruction Set Architecture (ISA) is the part of the processorthat is visible to the programmer or compiler writer. The ISA serves asthe boundary between software and hardware. We will briefly describe theinstruction sets found in many of the microprocessors used today. The ISAof a processor can be described using 5 catagories:
- Operand Storage in the CPU
- Where are the operands kept other than in memory?
- Number of explicit named operands
- How many operands are named in a typical instruction.
- Operand location
- Can any ALU instruction operand be located in memory? Or must all operandsbe kept internaly in the CPU?
- Operations
- What operations are provided in the ISA.
- Type and size of operands
- What is the type and size of each operand and how is it specified?
Of all the above the most distinguishing factor is the first.
The 3 most common types of ISAs are:
- Stack - The operands are implicitly on top of the stack.
- Accumulator - One operand is implicitly the accumulator.
- General Purpose Register (GPR) - All operands are explicitelymentioned, they are either registers or memory locations.
Lets look at the assembly code of
in all 3 architectures:
| Stack | Accumulator | GPR |
| PUSH A | LOAD A | LOAD R1,A |
| PUSH B | ADD B | ADD R1,B |
| ADD | STORE C | STORE R1,C |
| POP C | - | - |
Not all processors can be neatly tagged into one of the above catagories.The i8086 has many instructions that use implicit operands although ithas a general register set. The i8051 is another example, it has 4 banksof GPRs but most instructions must have the A register as one of its operands.
What are the advantages and disadvantages of each of these approachs?
Stack
Advantages: Simple Model of expression evaluation (reverse polish).Short instructions.
Disadvantages: A stack can't be randomly accessed This makes ithard to generate eficient code. The stack itself is accessed every operationand becomes a bottleneck.
Accumulator
Advantages: Short instructions.
Disadvantages: The accumulator is only temporary storage so memorytraffic is the highest for this approach.
GPR
Advantages: Makes code generation easy. Data can be stored forlong periods in registers.
Disadvantages: All operands must be named leading to longer instructions.
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Earlier CPUs were of the first 2 types but in the last 15 years allCPUs made are GPR processors. The 2 major reasons are that registers arefaster than memory, the more data that can be kept internaly in the CPUthe faster the program wil run. The other reason is that registers areeasier for a compiler to use.
Reduced Instruction Set Computer (RISC)
As we mentioned before most modern CPUs are of the GPR (General PurposeRegister) type. A few examples of such CPUs are the IBM 360, DEC VAX, Intel80x86 and Motorola 68xxx. But while these CPUS were clearly better thanprevious stack and accumulator based CPUs they were still lacking in severalareas:
- Instructions were of varying length from 1 byte to 6-8 bytes. Thiscauses problems with the pre-fetching and pipelining of instructions.
- ALU (Arithmetic Logical Unit) instructions could have operands thatwere memory locations. Because the number of cycles it takes to accessmemory varies so does the whole instruction. This isn't good for compilerwriters, pipelining and multiple issue.
- Most ALU instructions had only 2 operands where one of the operandsis also the destination. This means this operand is destroyed during theoperation or it must be saved before somewhere.
Thus in the early 80's the idea of RISC was introduced. The SPARC projectwas started at Berkeley and the MIPS project at Stanford. RISC stands forReduced Instruction Set Computer. The ISA is composed of instructions thatall have exactly the same size, usualy 32 bits. Thus they can be pre-fetchedand pipelined succesfuly. All ALU instructions have 3 operands which areonly registers. The only memory access is through explicit LOAD/STORE instructions.
Thus C = A + B will be assembled as:
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Although it takes 4 instructions we can reuse the values in the registers.
Why is this architecture called RISC? What is Reduced about it?
The answer is that to make all instructions the same length the numberof bits that are used for the opcode is reduced. Thus less instructionsare provided. The instructions that were thrown out are the less importantstring and BCD (binary-coded decimal) operations. In fact, now that memoryaccess is restricted there aren't several kinds of MOV or ADD instructions.Thus the older architecture is called CISC (Complete Instruction Set Computer).RISC architectures are also called LOAD/STORE architectures.
The number of registers in RISC is usualy 32 or more. The first RISCCPU the MIPS 2000 has 32 GPRs as opposed to 16 in the 68xxx architectureand 8 in the 80x86 architecture. The only disadvantage of RISC is its codesize. Usualy more instructions are needed and there is a waste in shortinstructions (POP, PUSH).
Thus in the early 80's the idea of RISC was introduced. The SPARC projectwas started at Berkeley and the MIPS project at Stanford. RISC stands forReduced Instruction Set Computer. The ISA is composed of instructions thatall have exactly the same size, usualy 32 bits. Thus they can be pre-fetchedand pipelined succesfuly. All ALU instructions have 3 operands which areonly registers. The only memory access is through explicit LOAD/STORE instructions.
Thus C = A + B will be assembled as:
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Although it takes 4 instructions we can reuse the values in the registers.
Why is this architecture called RISC? What is Reduced about it?
The answer is that to make all instructions the same length the numberof bits that are used for the opcode is reduced. Thus less instructionsare provided. The instructions that were thrown out are the less importantstring and BCD (binary-coded decimal) operations. In fact, now that memoryaccess is restricted there aren't several kinds of MOV or ADD instructions.Thus the older architecture is called CISC (Complete Instruction Set Computer).RISC architectures are also called LOAD/STORE architectures.
The number of registers in RISC is usualy 32 or more. The first RISCCPU the MIPS 2000 has 32 GPRs as opposed to 16 in the 68xxx architectureand 8 in the 80x86 architecture. The only disadvantage of RISC is its codesize. Usualy more instructions are needed and there is a waste in shortinstructions (POP, PUSH).
So why are there still CISC CPUs being developed? Why is Intel spendingtime and money to manufacture the Pentium II and the Pentium III?
The answer is simple, backward compatibility. The IBM compatible PC isthe most common computer in the world. Intel wanted a CPU that would runall the applications that are in the hands of more than 100 million users.On the other hand Motorola which builds the 68xxx series which was usedin the Macintosh made the transition and together with IBM and Apple builtthe Power PC (PPC) a RISC CPU which is installed in the new Power Macs.As of now Intel and the PC manufacturers are making more money but withMicrosoft playing in the RISC field as well (Windows NT runs on Compaq'sAlpha) and with the promise of Java the future of CISC isn't clear at all.
An important lesson that can be learnt here is that superior technologyis a factor in the computer industry, but so are marketing and price aswell (if not more).
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References For Further Reading
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